Snowmaking Monitor

A ski resort's snow cannons only pay off below a cutoff temperature, so the slope station works in signed whole °C. The forecast unit supplies the expected drift over the next hour. Your monitor predicts the next reading, measures how far the slope sits from the cutoff, and raises two flags. None of these results may ever wrap, whatever the inputs.

Interface

Port	Direction	Type	Description
`temp`	in	8-bit signed	Measured slope temperature
`rise`	in	8-bit signed	Forecast drift for the next hour (may be negative)
`cutoff`	in	8-bit signed	Snowmaking cutoff temperature
`pred`	out	9-bit signed	Predicted temperature: `temp` + `rise`
`dev`	out	9-bit signed	Distance from the cutoff: `temp` − `cutoff`
`warm`	out	1 bit	High when `temp` is strictly above `cutoff`: pause the cannons
`thaw`	out	1 bit	High when `pred` is at or above 0 °C: the slope starts thawing

Behavior

pred is the full 9-bit sum of temp and rise; extreme pairs like 100 + 90 or −100 + −90 must come out exact, never wrapped
dev is the full 9-bit difference temp − cutoff; extremes like 120 − (−120) = 240 must come out exact
warm is high exactly when temp > cutoff; at temp = cutoff it stays low
thaw is high exactly when pred ≥ 0; a predicted 0 °C already counts as thawing
All comparisons are signed: −1 is below 0, not above 255. The testbench includes pairs that expose an unsigned misreading

Constraints

OPERATORS

only +, -, and relational operators; widen with resize in VHDL or via the 9-bit target in SystemVerilog.

One concurrent assignment per output; no processes or always blocks
In VHDL, route each comparison with the '1' when ... else '0' recipe

arithmetic combinational

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