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Practice

Machine Status Panel

A machine controller exposes two status lines, RUN and FAULT, and the wiring plan calls for a status panel. Each line lights its own lamp, and the fault line also sounds a horn. Nothing is computed here. The point of this exercise is that, for the first time, you write the component's boundary. The template provides only the empty shells, with the entire port list missing.

Declare all five ports from the table below, then wire each output to its input.

Interface

PortDirectionTypeDescription
run_iin1 bitRUN status from the controller
fault_iin1 bitFAULT status from the controller
panel_run_oout1 bitRUN lamp
panel_fault_oout1 bitFAULT lamp
horn_oout1 bitHorn; sounds while FAULT is active

Declare all ports as std_logic.

Behavior

  • panel_run_o follows run_i at all times
  • panel_fault_o follows fault_i at all times
  • horn_o also follows fault_i: one input feeding two destinations
  • The testbench steps through the input combinations and checks all three outputs at every step

Constraints

  • Three assignment outside a procedural blocks are all you need; no other constructs The first run fails before you've declared the ports because the testbench cannot connect to a component that has none.

  • It stops with signal "run_i" is not an interface name, one such line per missing port. Declare the ports and the errors disappear.

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