Cold-Chain Monitor
A refrigerated truck carries frozen goods that must ride between −30 °C and −18 °C, and the monitoring unit itself runs from a battery. You're building the alarm logic: a signed temperature reading and an unsigned battery percentage come in, four status flags go out.
All three limits must be named constants from the integer family. In VHDL two of them are negative and a natural can't hold those; in SystemVerilog all three are int.
Interface
| Port | Direction | Type | Description |
|---|---|---|---|
temp | in | 8-bit signed | Cargo temperature, °C |
batt | in | 7-bit unsigned (0–100) | Battery charge, percent (0 to 100) |
too_cold | out | 1 bit | Temperature below −30 °C |
too_warm | out | 1 bit | Temperature above −18 °C |
temp_ok | out | 1 bit | Temperature within −30 to −18, inclusive |
batt_low | out | 1 bit | Battery below 25 % |
Declarations: VHDL, signed(7 downto 0) for temp, unsigned(6 downto 0) for batt, std_logic for the flags; SystemVerilog, logic signed [7:0], logic [6:0], and logic.
Behavior
too_coldis '1' whentempis below −30; −30 itself is in spectoo_warmis '1' whentempis above −18; −18 itself is in spec. Note that 0 °C and every positive reading count as too warmtemp_okis '1' exactly when neither temperature flag is upbatt_lowis '1' whenbattis below 25; 25 itself is fine- Boundaries are tested on both sides: −31/−30 and −18/−17 for temperature, 24/25 for battery
Constraints
declare the three limits as constants (constant / localparam int), named in ALL_CAPS. In VHDL, pick each constant's type deliberately: the temperature limits need integer, the battery limit fits a natural.
- The comparison recipe from the lesson is all you need:
'1' when ... else '0'in VHDL, a bare comparison in SystemVerilog. - For
temp_okyou may compare against both limits directly, or combine your own flag outputs with gates. Reading your ownoutports is fine; see the note in Port Directions.
Click Run to execute your code. Output will appear here.