Practice
Stirrer Sign-Off
Hollow Ash Dairy cools 4000 litres of milk in a steel tank. A paddle stirrer keeps the cream from settling while the tank chills. The stirrer controller is a small sealed module: press start and it stirs for 6 cycles, then rests 4 cycles so the milk can settle. A stop line from the foam sensor cuts a stir short.
The dairy now buys refurbished controllers, and two bad batches taught it to test every delivery. The refurbisher agreed to a deal. Incoming units are accepted or rejected by the dairy's own bench, and that bench must first prove it can detect faults. So each delivery comes with two known-bad units, defects printed on their labels. Unit X restarts when start is pressed during the rest window. Unit Y reacts to stop 1 cycle late.
The controllers are sealed parts in real life. Their code sits in the template only so the rig can run. Treat them as sealed parts and build the test bench from the specification.
Your task: write the whole sign-off bench. Reset the rig, script every scenario the contract below names, and call the given check_stir after each cycle you want judged. The rig wires all three units to the same inputs. Your checks judge the good unit; the grader replays each one against unit X and unit Y.
Interface (each unit)
| Port | Direction | Type | Description |
|---|---|---|---|
clk | in | 1 bit | Clock |
rst | in | 1 bit | Synchronous reset (active high) |
start | in | 1 bit | Start request (sampled at the edge) |
stop | in | 1 bit | Foam sensor: cut the stir short |
run | out | 1 bit | Paddle motor on (registered) |
rest | out | 1 bit | Settle window active (registered) |
Behavior (the controller spec)
- In idle,
run = 0andrest = 0. Astart = 1withstop = 0at a rising edge begins a stir - A stir holds
run = 1for exactly 6 cycles, starting the cycle after that edge - When a stir ends, naturally or cut short,
runfalls andrest = 1holds for exactly the next 4 cycles. Then the controller returns to idle - During a stir,
stop = 1at an edge cuts the stir short: the rest window begins the next cycle startis ignored during a stir and during the rest window.stopis ignored outside a stir- With
start = 1andstop = 1at the same idle edge, the start is refused rst = 1at an edge returns the controller to idle, clearing both outputs- Outputs are registered: every effect shows the cycle after its edge
What the bench checks
- The grading bench (the read-only testbench tab) runs your bench inside it and audits every
check_stircall against the good unit - Every expected pair must match the good unit exactly: a sound procedure never flags the good part
- The grader replays each check against units X and Y; each must differ from your expected outputs at 1 check or more
- Your script must drive a full 6-cycle stir, a start during a stir, a start during the rest window, and a stop during a stir
- Your script must also assert a reset while the controller is busy
- At least 20 checks must run, none before
rsthas been high through a rising edge - The run ends when your bench sets
tb_done; a stalled bench times out and fails
Constraints
the controllers are synchronous to clk, with registered outputs: every effect shows the cycle after its edge. Drive at edges and check 1 ns after the edge you want judged.
the deliverable is the sign-off bench; all three controllers are sealed parts and stay untouched. The tank, the paddle motor, and the foam sensor are out of scope.
keep the given signal names, the three instances and the check_stir check helper exactly as they are. The grader finds them by name.
any of the three controllers. The bench is the deliverable.
the rig cannot tell an expectation computed from the spec from one copied off the good unit's pins. Copying is differential testing, a real technique, but it is not this exercise. Bench from the spec.
- Report mismatches only through
check_stir. The grader owns the verdict, so never print the word FAIL yourself - Drive inputs with nonblocking or signal assignments and check 1 ns after the edge you want judged
Do not add ports.
Click Run to execute your code. Output will appear here.