Seafloor Record Tagger

An ocean survey ship stores measurement records from a drill on the seabed. Each record needs a tag that identifies its station, sequence, and status.

A recorder update omitted the tag. The archive kept every measurement byte, but analysts could no longer identify where many records came from.

Your task: sample the tag fields when first_i arrives. Insert their 5 bytes before data_i, then drive the rebuilt record through data_o, first_o, last_o, and last_count_o.

Interface

Port	Direction	Type	Description
`clk_i`	in	1 bit	Record clock and the only DUT clock
`rst_i`	in	1 bit	Synchronous reset, active high
`first_i`	in	1 bit	First input word, one-clock pulse
`last_i`	in	1 bit	Final input word, one-clock pulse
`data_i`	in	32-bit vector	Input record data
`last_count_i`	in	2-bit vector	Valid bytes minus 1 on the final input word
`station_id_i`	in	16-bit vector	Station identifier, sampled with `first_i`
`sequence_i`	in	16-bit vector	Record sequence, sampled with `first_i`
`flags_i`	in	8-bit vector	Record status flags, sampled with `first_i`
`first_o`	out	1 bit	First output word, one-clock pulse
`last_o`	out	1 bit	Final output word, one-clock pulse
`data_o`	out	32-bit vector	Tagged output record
`last_count_o`	out	2-bit vector	Valid bytes minus 1 on the final output word

Tag layout

Bytes leave the block in the order below. The first byte in every word occupies bits 7 through 0.

Byte	Value
0	`station_id_i[7:0]`
1	`station_id_i[15:8]`
2	`sequence_i[7:0]`
3	`sequence_i[15:8]`
4	`flags_i[7:0]`

The first payload byte is data_i[7:0] from the word carrying first_i.

Behavior

first_i and last_i are inclusive one-clock pulses on the first and final input words
Every input cycle from first_i through last_i carries a valid word, with no gaps
Each record contains at least 2 input words
Every input word except the final word contains 4 valid bytes
On the final input word, last_count_i values 0 through 3 mean 1 through 4 valid bytes
last_count_i is ignored on every input word that does not carry last_i
Valid bytes on a partial final input word occupy the lowest byte lanes
The output byte stream is the 5 captured tag bytes followed by every valid input byte in order
If first_i is sampled at rising edge N, first_o pulses immediately after rising edge N+1
Output words are continuous from first_o through last_o, with no gaps
last_count_o is 3 on every output word that does not carry last_o
Invalid byte lanes on the final output word are zero
Tag inputs are captured on the edge that samples first_i; later changes cannot alter the active record
Three complete input cycles after last_i have both input markers low; the next first_i may occur on the fourth cycle
rst_i wins over all inputs, abandons the active record, clears both output markers, and prevents buffered bytes from appearing later
Reset clears data_o and last_count_o to zero

The final output count follows this table:

`last_count_i`	Valid bytes in final input word	Extra output word	`last_count_o` with `last_o`
0	1	no	1
1	2	no	2
2	3	no	3
3	4	yes	0

For last_count_i values 0 through 2, last_o pulses 2 rising edges after last_i. For value 3, it pulses 3 rising edges afterward.

What the bench checks

The testbench compares complete output records with an independent byte-oriented reference model
It checks exact tag order, low-byte-first lane order, payload continuity, and zeroed invalid lanes
It covers 2-word records with all 4 legal final byte counts
It sends longer records with a different byte value in every lane
It changes every tag input immediately after first_i and checks that the captured tag remains unchanged
It checks the exact first_o and last_o cycles for both possible endings
It sends records with exactly 3 idle input cycles between them
It asserts reset with first_i, while bytes are buffered, and when a tail is pending

Constraints

TIMING: everything is synchronous to clk_i, and all outputs are registered. Only first_o has a fixed 1-clock latency.

TRAFFIC: there are no valid or ready handshake signals. Input words arrive on every clock from first_i through last_i and cannot be stalled.

SCOPE: this block only inserts the archive tag and repacks bytes. Storage media, sensor electronics, and error detection are out of scope.