Practice
Roller Rink Fader
The Starlite roller rink runs its light-and-sound show from one aging FPGA, and the last build came out 97 percent full. The one new feature the owner asked for this year is a stereo balance fader, so the announcer's microphone can follow a birthday party around the rink.
The block itself is small. It takes one 8-bit audio sample and two 8-bit gain knobs. It outputs two products to the DAC card (the board that turns numbers back into sound): left = sample * gain_l and right = sample * gain_r. The intern wrote exactly that, one multiplier per channel. It measures 720 cells on the Netlist tab. Your budget is 500 cells, and the mirror-ball motor controller is not getting smaller to make room.
The DAC card's contract gives you the opening: the card reloads its registers slowly, so nobody needs fresh products on the very next edge. The Behavior section grants a 2-edge settle window.
Your task: produce the same two products with 500 cells or fewer. The booth's honor board has this block at 389 cells, with exactly 1 multiplier in it.
Interface
| Port | Direction | Type | Description |
|---|---|---|---|
clk | in | 1 bit | Clock |
rst | in | 1 bit | Synchronous reset (active high) |
sample | in | 8-bit vector | Audio sample, unsigned |
gain_l | in | 8-bit vector | Left gain, unsigned |
gain_r | in | 8-bit vector | Right gain, unsigned |
left | out | 16-bit vector | sample * gain_l, unsigned, registered |
right | out | 16-bit vector | sample * gain_r, unsigned, registered |
Behavior
- Both outputs are registers; after a reset edge both read 0
- Whenever
sample,gain_landgain_rare unchanged at two consecutive rising edges,leftandrightmust equal the two products from the second of those edges onward - The outputs then hold steady while the inputs hold
- While the inputs are changing, the outputs are unconstrained until the two-edge settle has elapsed
- Products are plain unsigned 8x8 multiplication into 16 bits, no rounding, no saturation
rst = 1at a rising edge clears both outputs to 0, whatever was in flight; after release the settle rule applies as usual
What the bench checks
- The testbench never checks inside the settle window
- Directed holds cover silence, centered gain, hard-left and hard-right settings, muted output, low values, asymmetry, and full-scale multiplication
- Thirty pseudo-random input sets are each held for four cycles, with both products checked after the first two edges
- Reset mid-run must clear both outputs immediately, followed by a correctly settled directed result
Constraints
everything is synchronous to clk and both outputs are registered.
this models the two gain products and nothing else. The microphone chain and the DAC card are out of scope; the 2-edge settle window comes from the card's reload contract.
500 cells or fewer, as counted by the Netlist tab's stats bar after you run your design. The intern's two-multiplier draft measures 720; the honor-board record is 389 with a single multiplier.
The testbench cannot count cells or multipliers. It only enforces behavior; the budget is on your honor, and the Netlist tab keeps the score.
Do not add ports.
Click Run to execute your code. Output will appear here.