Practice

Hymn Board Digits

The church of St. Botolph has announced its hymn numbers on the same electric board since 1983: two glowing digits on the wall, set from a small console in a back room. In February a roof leak reached the wiring, and the digit latch card died with a pop the whole choir heard. The console still works, and the lamp drivers still work. What is gone is the small card in between: the one that watched the console bus and remembered which digit showed what. The company that made it closed down before the organist was born.

There is one stroke of luck. The church of St. Mary across town has the same installation, still working. A friendly engineer clipped a logic analyzer onto it during Thursday practice: a tool that records every signal, cycle by cycle. The capture is 20 cycles long and includes a brief power dip. Every rule the dead card followed is in there, including the ones the console quietly relies on.

Your task: build a drop-in replacement. Same bus, same behavior, cycle for cycle. The organist must not notice.

Interface

Port	Direction	Type	Description
`clk`	in	1 bit	Clock
`rst`	in	1 bit	Synchronous reset (active high)
`stb`	in	1 bit	Write strobe from the console
`sel`	in	1 bit	Digit select (0 = ones, 1 = tens)
`data`	in	4-bit vector	Digit value from the console
`tens`	out	4-bit vector	Tens digit, held for the lamp drivers
`ones`	out	4-bit vector	Ones digit, held for the lamp drivers

Behavior

Treat the trace as the contract, column by column, one clock per column. Inputs are sampled at the rising edge; outputs change at rising edges and nowhere else. data, tens and ones are decimal digit values.

cycle |  0  1  2  3  4  5  6  7  8  9 10 11 12 13 14 15 16 17 18 19
------+------------------------------------------------------------
rst   |  1  1  0  0  0  0  0  0  0  0  0  0  1  0  0  0  0  0  0  0
stb   |  0  0  0  1  0  0  1  1  1  0  1  1  1  1  1  0  0  1  0  0
sel   |  0  0  0  0  0  0  1  1  0  0  0  0  0  0  1  1  1  1  0  0
data  |  0  0  7  7  7  2  2  9  9  9  5  8  8  8  8  8  8  3  3  3
tens  |  0  0  0  0  0  0  0  2  2  2  2  2  2  0  0  0  0  0  3  3
ones  |  0  0  0  0  7  7  7  7  7  7  7  5  5  0  8  8  8  8  8  8

Whenever rst is 1 at a rising edge the card returns to the state of cycles 0 and 1 (both digits 0), whatever the console is doing

What the bench checks

The testbench replays this capture cycle for cycle and checks tens and ones on every cycle
It then runs the same shapes again with different digits: longer strobe holds, and sel and data wandering during a hold
It also drives writes on back-to-back strobes separated by a single low cycle, and another reset that lands in the middle of a held strobe
Everything the bench enforces is exhibited somewhere in the capture

Constraints

TIMING

everything is synchronous to clk; tens and ones are registered, which the capture confirms.

SCOPE

this replicates the dead latch card at its bus ports, as the capture shows it. The console, the lamp drivers, and the card's original internals are out of scope.

Match the capture exactly. Do not add ports, and do not special-case the literal digit values: the second run uses different ones.

sequential register decoder

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