Fountain Stagger

The Marchetti fountain has 4 pump groups: the perimeter jets, two arc rings, and the center plume. Each group starts through a contactor (a heavy relay that switches the pump motor). The contactors used to close on the same clock cycle. Four motors starting at once tripped the plaza's feed breaker about one morning in five. The city electrician's report is one sentence: start them 4 counts apart and the breaker holds.

Here is the catch. The show controller is a small programmable logic chip (a CPLD) with 6 spare macrocells, and in this chip family one macrocell means one flip-flop. The obvious design, a chain of delay stages with one flip-flop per count, synthesizes to 13 flip-flops. It does not fit.

Your task: build the staggered starter in 6 flip-flops or fewer. When go rises, en(0) starts first, and en(1), en(2), en(3) join at 4-count intervals. Everything stays on while go stays high. The go line is also the dead-man switch, the line that must stay high for anything to run. Every contactor must release the moment go drops, not a clock cycle later, and the next start replays the whole stagger. The Netlist tab keeps the score, and the house record is 4.

Interface

Behavior

• Call cycle 1 the first full clock cycle after go is sampled high at a rising edge
• en(0) is high during cycle 1 and every following cycle while go stays high
• en(1) joins from cycle 5, en(2) from cycle 9, en(3) from cycle 13, each staying high while go holds
• Once all four are on, the pattern holds steady for as long as go stays high, however long that is
• When go goes low, all four enables are low by the next check, and the stagger starts over on the next assertion of go
• A one-cycle dropout of go restarts the full sequence
• rst = 1 at a rising edge clears the stagger timer; during that cycle en(0) follows go and the other three enables are low
• The reset cycle does not advance the sequence: with go held high, the full stagger replays, counted from the first edge after rst falls

What the bench checks

• The testbench checks all four enables on every cycle
• The testbench drives full ramps, long holds, dead-man drops from every phase, a one-cycle go blip, and a reset in mid-ramp
• After every drop of go it also probes the enables between clock edges: a release that waits for the next edge fails

Constraints

The enables may be plain combinational decode. The testbench cannot count flip-flops; it only enforces behavior. The budget is on your honor.

Do not add ports.